In a digital multiplex transmission system such as described, for example, in Netherlands Patent Application No. 8203110 a digital signal is applied at the transmitting side to a CMI-encoding unit in which the digital signal is converted into the CMI-code format (coded mark inversion) recommended for the bit rate. The CMI-code is a two-level code in which a logic 0 bit is encoded such that each of the two levels is present during half a bit time interval, first one level and thereafter the other level. A logic 1 bit is encoded by one of the two levels during an entire bit period interval and in such a manner that the level alternates for sequential logic 1 bits. At the receiver end of the CMI-interface the digital path comprises a CMI-decoder unit in which after equalization and recovering with the aid of the recovered system clock the received CMI-encoded signal is converted into the normal binary code. The original, composite digital signal is then available at the output of the CMI-decoding unit with the nominal bit rate and the original system clock.
In said transmission systems it is customary to supervise the code converters to prevent a cascade of alarms from occurring downstreams when the code converter does not function correctly. This type of supervision frequently utilizes the redundance of the line code of the input signal. The line code rule is then supervised for any infringements, such that when the number of infringements exceeds a predetermined threshold the conclusion can be made, when the input signal is a correct signal, that the decoding unit is defective.
If a supervision circuit of said type is to have any practical sense, then the restriction holds that the complexity of the supervision circuit must be low compared with the circuit it supervises. This excludes, for example, a bit-by-bit comparison. Also operating with twice the clock frequency of the input signal for transmitting the two levels in one bit period of a CMI-encoded signal at the clock frequency, and to supervise the line encoding rule in that way, is impractical in view of the high clock frequency (140 MHz) of the CMI-input signal.